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  general description the ibutton ? temperature logger (DS1925) is a rugged, self-sufficient system that measures temperature and records the result in a protected memory section. the recording is done at a user-defined rate. a total of 122k 8-bit readings or 61k 16-bit readings taken at equidistant intervals ranging from 5min to 273hrs can be stored. in addition, there are 512 bytes of nonvolatile memory for storing application-specific information. a mission to col - lect data can be programmed to begin immediately, after a user-defined delay, or after a temperature alarm. access to the memory and control functions can be password protected. the DS1925 is configured and communicates with a host computing device through the serial 1-wire ? protocol, which requires only a single data lead and a ground return. every DS1925 is factory-lasered with a guaranteed unique 64-bit registration number that allows for absolute traceability. the durable stainless-steel pack - age is highly resistant to environmental hazards such as dirt, moisture, and shock. accessories permit the DS1925 to be mounted on almost any object, including containers, pallets, and bags. applications temperature logging in cold chain food safety bio science pharmaceutical and medical products high-tempera- ture logging (process monitoring, industrial monitoring) beneits and features provides high-quality temperature exposure assessment of an end product ? temperature measurement accuracy of 0.5c with storage for up to 125,440 timestamped values ? flexibility to monitor and data-log long duration exposures with short-duration time intervals ? unique factory-lasered 64-bit serial number en- sures absolute traceability because no two parts are alike highly configurable options for data logging and security ? programmable sample rates from 5min to 273hrs ? programmable recording start delay after elapsed time or upon a temperature alarm trip point ? two-level password protection of all memory and coniguration registers ? measure and report internal battery level and output-logged data if a battery is depleted physically robust, operationally efficient ? durable stainless-steel enclosure withstands harsh environments and conditions ? communicates to a host system with the single- contact 1-wire interface ? -40c to +85c operating temperature range ordering information appears at end of data sheet. ibutton and 1-wire are registered trademarks of maxim integrated products, inc. 19-8480; rev 1; 4/16 DS1925 ibutton high-capacity temperature logger with 122kb data-log memory typical application circuit examples of accessories c v cc 10k piox 02 53 ? 000000fbc52b ? r pup pioy thermochron 1-wire ? ? part accessory ds9093ra mounting lock ring ds9093a snap-in fob ds9092 ibutton probe ds1402d-dr8+ blue dot receptor cable evaluation kit available downloaded from: http:///
io voltage to gnd .................................................. -0.3v to +6v io sink current ...................................................................20ma operating temperature range ........................... -40c to +85c junction temperature ...................................................... +150c storage temperature range ............................. -40c to +85c* (v pup = 3.0v to 5.25v, unless otherwise noted.) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 2 absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. * storage or operation above +50c significantly reduces battery life. electrical characteristics parameter symbol conditions min typ max units operating temperature t a (note 1) -40 +85 c io pin: general data 1-wire pullup resistance r pup (notes 2, 3) 2200 ? input capacitance c io (note 4) 120 nf input leakage current i l io pin at v pup 6 60 a high-to-low switching threshold v tl (notes 5, 6) 0.5 x v pup v input low voltage v il (notes 2, 7) 0.4 v low-to-high switching threshold v th (notes 5, 8) 0.75 x v pup v switching hysteresis v hy (note 9) 0.2 x v pup v output low voltage v ol at 4ma (note 10) 0.4 v recovery time (note 2) t rec standard speed, r pup = 2200? 5 s overdrive speed, r pup = 2200? 2 overdrive speed, directly prior to reset pulse; r pup = 2200? 5 time slot duration (note 2) t slot standard speed 65 s overdrive speed 8 rising-edge hold-off time t reh (note 11) 0.1 s io pin: 1-wire reset, presense-detect cycle reset low time (note 2) t rstl standard speed, v pup 480 640 s overdrive speed 48 80 presence-detect sample time (note 2) t msp standard speed 65 75 s overdrive speed 8 10 downloaded from: http:///
(v pup = 3.0v to 5.25v, unless otherwise noted.) note 1: limits are 100% tested at t a = +85c (and/or t a = +25c). limits over the operating temperature and relevant supply volt - age range are guaranteed by design and characterization. note 2: system requirement. note 3: maximum allowable pullup resistance is a function of the number of 1-wire devices in the system and 1-wire recovery times. the specified value here applies to systems with only one device and with the minimum 1-wire recovery times. for more heavily loaded systems, an active pullup such as that found in the ds2480b may be required. note 4: typical value represents the internal parasite capacitance when v pup is first applied. once the parasite capacitance is charged, it does not affect normal communication. note 5: v tl , v th are a function of the internal supply voltage. note 6: voltage below which, during a falling edge on io, a logic 0 is detected. note 7: the voltage on io must be less than or equal to v ilmax whenever the master drives the line low. note 8: voltage above which, during a rising edge on io, a logic 1 is detected. note 9: after v th is crossed during a rising edge on io, the voltage on io must drop by v hy to be detected as logic 0. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 3 electrical characteristics (continued) parameter symbol conditions min typ max units io pin: 1-wire write write-zero low time (note 2) t w0l standard speed 60 120 s overdrive speed 6 16 write-one low time (notes 2, 12) t w1l standard speed 5 15 - s overdrive speed 0.25 2 - io pin: 1-wire read read low time (notes 2, 13) t rl standard speed 5 15 - s overdrive speed 0.25 2 - read sample time (notes 2, 13) t msr standard speed t rl + 15 s overdrive speed t rl + 2 real-time clock accuracy t acc +25c 1 min/month frequency deviation ? f -40c to +85c -300 +60 ppm temperature converter conversion time t conv 10 ms thermal response time constant t resp ibutton package (note 14) 130 s conv. error ? j (note 15) -0.5 +0.5 c command delays and current standard delay t std 5 ms long standard delay t lstd 15 ms xpc clear memory (log) t cml 1500 ms rtc start delay from clear memory state t srtc 500 ms xpc active current i xpca 5 ma downloaded from: http:///
(v pup = 3.0v to 5.25v, unless otherwise noted.) note 10: the i-v characteristic is linear for voltages less than 1v. note 11: the earliest recognition of a negative edge is possible at t reh after v th has been previously reached. note 12: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to v th . note 13: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to the input-high threshold of the bus master. note 14: this number was derived from a test conducted by cemagref antony, france, in july 2000 (cemagref test report no. e42). note 15: maxim data-logger products are 100% tested and calibrated at time of manufacture to ensure that they meet all data sheet parameters, including temperature accuracy. as with any sensor-based product, user shall be responsible for occasionally rechecking the temperature accuracy of the product to ensure it is still operating properly. furthermore, as with all products of this type, when deployed in the field and subjected to handling, harsh environments, or other hazards/use conditions, there may be some extremely small but nonzero logger failure rate. in applications where the failure of any logger is a con - cern, user shall assure that redundant (or other primary) methods of testing and determining the handling methods, quality, and fitness of the articles and products are implemented to further mitigate any risk. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 4 ibutton can physical speciication electrical characteristics (continued) size see the package information section. weight ca. 3.3 grams downloaded from: http:///
maxim integrated 5 www.maximintegrated.com DS1925 ibutton high-capacity temperature logger with 122kb data-log memory minimum product lifetime 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 product lifetime (years) temperature ( c) rtc on / missioned (sample rate >= 5min) * rtc off (after first communication) * shelf life (from manufacturer) *not connected to 1 - wire. typical lifetime with 1 - wire idle high is 0.5yr. downloaded from: http:///
detailed description the DS1925 is an ideal device to monitor for extended time periods the temperature of any object it is attached to or shipped with, such as fresh produce, medical drugs, and supplies, and for use in refrigerators and freezers. note that the initial sealing level of the DS1925 achieves ip56. aging and use conditions can degrade the integrity of the seal over time, so for applications with significant expo - sure to liquids, sprays, or other similar environments, it is recommended to place the DS1925 in the ds9107 ibutton capsule. the ds9107 provides a watertight enclosure that has been rated to ip68 (refer to application note 4126: understanding the ip (ingress protection) ratings of ibutton data loggers and capsule ). software for setup and data retrieval through the 1-wire interface is available for free download from the maxim website at www.maximintegrated.com/1-wiredrivers . this soft - ware also includes drivers for the serial and usb port of a pc, and routines to access the general-purpose memory for storing application- or equipment-specific data files. overview figure 1 shows the relationships between the DS1925s major control and memory sections. the device has five main data components: 1) 64-bit lasered rom, 2) 256-bit scratchpad, 3) 512-byte general-purpose memory, 4) two 256-bit register pages of timekeeping, control, status, and counter registers and passwords, and 5) 122kb of data- logging memory. except for the rom and the scratchpad, all other memory is arranged in a single linear address space. the data-logging memory, counter registers, and several other registers are read-only for the user. both register pages are write-protected while the device is programmed for a mission. the password registers, one for a read password and another one for a read/write password, can only be written, never read. figure 2 shows the hierarchical structure of the 1-wire protocol. the bus master must first provide one of the eight rom function commands: 1) read rom, 2) match rom, 3) search rom, 4) conditional search rom, 5) skip rom, 6) overdrive-skip rom, 7) overdrive-match rom, or 8) resume. upon completion of an overdrive rom command byte executed at standard speed, the device enters overdrive mode, where all subsequent com - munication occurs at a higher speed. figure 12 describes the protocol required for these rom function commands. after a rom function command is successfully executed, the memory and control functions become accessible and the master can provide any one of the eight available commands. figure 9 describes the protocol for these memory and control function commands. all data is read and written least significant bit first . DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 6 pin conigurationpin description 5.89mm 0.51mm branding f5 size gnd io 17.35mm 16.25mm 02 53 1-wire ? 000000fbc52b ? ? thermochron ? name function io input/output gnd ground downloaded from: http:///
figure 1. DS1925 block diagram figure 2. hierarchical structure for 1-wire protocol DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 7 rom function control 64-bit lasered rom memory function control parasite powered circuitry 256-bit scratchpad general-purpose nv memory (512 bytes) register pages (64 bytes) internal timekeeping and control registers and counters data-log memory 122kb control logic adc thermal sense 32.768khz oscillator DS1925 3v lithium i/o 1-wire port bus master otherdevices 1-wire net commandlevel: DS1925 available commands: data field affected: read rommatch rom search rom conditional search rom skip rom resume overdrive-skip rom overdrive-match rom 1-wire rom function commands DS1925-specific memory function commands write scratchpadread scratchpad xpc copy scratchpad xpc read memory xpc clear memory xpc forced conversion xpc read battery voltage xpc start mission xpc stop mission 64-bit rom, rc-flag64-bit rom, rc-flag 64-bit rom, rc-flag 64-bit rom, rc-flag, alarm flags, search conditions rc-flagrc-flag rc-flag, od-flag 64-bit rom, rc-flag, od-flag 256-bit scratchpad, flags 256-bit scratchpad 512-byte data memory, registers, flags, passwords memory, registers, passwordsmission timestamp, mission samples counter, start delay, alarm flags, passwords, rtc memory addresses 020chC020dhnone flags flags downloaded from: http:///
parasite power the block diagram ( figure 1 ) shows the parasite-powered circuitry. this circuitry steals power whenever the i/o input is high. i/o will provide sufficient power as long as the specified timing and voltage requirements are met. the advantage of parasite power is that if the battery is exhausted for any reason, the rom and data log may still be read. 64-bit unique rom each DS1925 contains a unique rom code that is 64 bits long. the first 8 bits are a 1-wire family code. the next 48 bits are a unique serial number. the last 8 bits are a crc of the first 56 bits. see figure 3 for details. the 1-wire crc is generated using a polynomial generator consisting of a shift register and xor gates as shown in figure 4 . the polynomial is x 8 + x 5 + x 4 + 1. additional information about the maxim integrated 1-wire cyclic redundancy check (crc) is available in application note 27: understanding and using cyclic redundancy checks with maxim 1-wire and ibutton products. the shift register bits are initialized to 0. then starting with the least significant bit of the family code, one bit at a time is shifted in. after the 8th bit of the family code has been entered, then the serial number followed by the tempera - ture range code is entered. after the range code has been entered, the shift register contains the crc value. shifting in the 8 bits of crc returns the shift register to all 0s. clear memory state the DS1925 enters a clear memory state if it is new or if an xpc clear memory (log) sequence is done. in this state, some commands that enable the rtc takes an extra 500ms the first time they are called. the commands that could incur this additional delay (t srtc ) are xpc copy scratchpad (99h), xpc forced conversion (4bh), xpc start mission (ddh), and xpc read battery voltage (33h). this is a one- time delay when coming out of the clear memory state. figure 3. 64-bit unique rom figure 4. 1-wire crc generator DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 8 8-bit crc code 48-bit serial number 8-bit family code [53h] msb lsb msb lsb msb lsb msb lsb x 0 input data 1 st stage 2 nd stage 3 rd stage 4 th stage 5 th stage 6 th stage 7 th stage 8 th stage x 1 x 2 x 3 x 4 x 5 x 6 x 7 x 8 polynomial = x 8 + x 5 + x 4 + 1 downloaded from: http:///
memory figure 5 shows the DS1925s memory map. the 512 bytes of general-purpose nonvolatile memory is located in pages 0 to 15. the various registers to set up and control the device fill pages 16 and 17, called register pages 1 and 2 (details in figure 6 ). the data-log log - ging memory starts at address 1000h (page 122) and extends over 3920 pages. the memory pages 18 to 127 are reserved for future extensions. the scratchpad is an additional page that acts as a buffer when writing to the sram memory or the register page. the data memory can be written at any time. see the security by password section for ways to protect the memory. the access type for the register pages is r egister-specific and depends on whether the device is programmed for a mission. figure 6 shows the details. the data-log memory is read-only for the user. it is written solely un der supervision of the on-chip control logic. see the address registers and transfer status section for details. several commands provide a repeating result byte as described in table 1 . figure 5. memory map table 1. repeating byte commands DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 9 repeat byte description ffh operation not complete aah (or 55h) operation success 22h unable to complete the operation due to mission is in progress 44h error writing memory: possibly writing memory that needs to be cleared 77h invalid parameter in operation 33h invalid authorization sequence: usually indicates ta1/ta2/es is not correct in a copy operation 11h invalid password 00h unable to complete operation, requires xpc clear memory (log) sequence required 32-byte intermediate storage scratchpad address00000hC0001fh 32-byte general-purpose nv memory (r/w) page 0 00020hC001ffh general-purpose nv memory (r/w) pages 1 to 15 00200hC0021fh 32-byte register page 1 page 16 00220hC0023fh 32-byte register page 2 page 17 00240hC0025fh (reserved for future extensions) page 18 00260h- 0027fh 32-byte mission backup register page 1 (read-only) page 19 00280h- 0029fh 32-byte mission backup regiser page 2 (read-only) page 20 002a0h- 00fffh (reserved for future extensions) pages 21 to 127 01000h- 1f9ffh data-log memory (read-only) pages 128 to 4047 downloaded from: http:///
figure 6. register pages map DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 10 addr b7 b6 b5 b4 b3 b2 b1 b0 function access* 0200h lsbyte seconds real-time clock registers r/w; r 0201h . . . 0202h . . . 0203h msbyte seconds 0204h (not used) (n/a) r; r 0205h (not used) (n/a) r; r 0206h low byte sample rate r/w; r 0207h 0 0 high byte 0208h low threshold temp alarms r/w; r 0209h high threshold 020ah reserved (n/a) r; r 020bh reserved (n/a) r; r 020ch low byte 0 0 0 0 0 latest temp r; r 020dh high byte 020eh reserved (n/a) r; r 020fh reserved 0210h 0 0 0 0 0 0 etha etla temperature alarm enable r/w; r 0211h 1 1 1 1 1 1 0 0 (n/a) r/w; r 0212h 0 0 0 0 0 0 ehss eosc rtc control r/w; r 0213h 1 1 suta 1 (x) tlfs 0 etl mission control r/w; r 0214h bor 1 1 1 0 0 thf tlf alarm status r; r 0215h 1 1 0 wfta memclr 0 mip 0 general status r; r 0216h low byte mission start delay counter r/w; r 0217h center byte 0218h high byte 0219h lsbyte seconds mission timestamp r/w; r 021ah . . . 021bh . . . 021ch msbyte seconds 021dh (not used) (n/a) r; r 021eh (not used) (n/a) r; r 021fh (no function; reads 00h) (n/a) r; r 0220h low byte mission samples counter r; r 0221h center byte 0222h high byte 0223h low byte device samples counter r; r 0224h center byte 0225h high byte 0226h coniguration code flavor r; r 0227h epw password control r/w; r 0228h first byte read access password w; --- . . . 022fh eighth byte 0230h first byte full access password w; . . . 0237h eighth byte 0238h (no function; all these bytes read 00h) (n/a) r; r 023fh *the irst entry in the access column is valid between missions. the second entry shows the applicable access type while a mission is in progress. downloaded from: http:///
detailed register descriptions timekeeping and calendar the real-time clock (rtc) is a second counter accessed by reading/writing the appropriate bytes in the register page, address 200hC203h. for readings to be valid, all rtc registers must be read sequentially starting at address 0200h. the number representation of the rtc registers is in seconds format. typically, this is the number of seconds since january 1, 1970 12:00a.m. see table 2 for the bitmap.sample rate the content of the sample rate register (addresses 0206h, 0207h) specifies the time elapse between tem - perature-logging events. the sample rate is coded as an unsigned 14-bit binary number with a maximum value of 16,383. if ehss = 1, the sample rate is in seconds. if ehss = 0, the sample rate is in minutes. the fatest recommended sample rate is 5 minutes. setting a sample rate less than 3 minutes (180 seconds eshss = 1 or 3 minutes ehss = 0) results in a failure on the xpc start mission command with repeat code 77h invalid parameter. the ehss bit is located in the rtc control register at address 0212h. it is important that the user sets the ehss bit accordingly while setting the sample rate register. during a mission, there is only read access to these registers. bits cells marked 0 always read 0 and cannot be written to 1. see table 3 for the bitmap. temperature conversion the DS1925 measures temperatures in the -40c to +85c range. temperature values are represented as an 8-bit or 16-bit unsigned binary number with a resolution of 0.5c in the 8-bit mode and 0.0625c in the 16-bit mode. the higher temperature byte trh is always valid. in 16-bit mode, only the three highest bits of the lower byte trl are valid. the five lower bits all read 0. trl is undefined if the device is in 8-bit temperature mode. an out-of-range temperature reading is indicated as 00h or 0000h when too cold and ffh or ffe0h when too hot. see table 4 for the bitmap. table 2. real-time clock and rtc alarm registers bitmap table 3. sample rate register bitmap table 4. latest temperature conversion result register bitmap table 5. temperature conversion examples DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 11 addr b7 b6 b5 b4 b3 b2 b1 b0 0200h lsbyte seconds 0201h . . . 0202h . . . 0203h msbyte seconds addr b7 b6 b5 b4 b3 b2 b1 b0 0206h sample rate low 0207h 0 0 sample rate high addr b7 b6 b5 b4 b3 b2 b1 b0 020ch t2 t1 t0 0 0 0 0 0 trl 020dh t10 t9 t8 t7 t6 t5 t4 t3 trh mode trh trl j = (c) DS1925 hex decimal hex decimal 8-bit 54h 84 1.0 8-bit 17h 23 -29.5 16-bit 54h 84 00h 0 1.000 16-bit 17h 23 60h 96 -29.3125 downloaded from: http:///
with trh and trl representing the decimal equivalent of a temperature reading, calculate the temperature value as: j (c) = trh/2 - 41+ trl/512 (16-bit mode, tlfs = 1, see address 0213h) j (c) = trh/2 - 41 (8-bit mode, tlfs = 0, see address 0213h) this equation is valid for converting temperature readings stored in the data-log memory as well as for data read from the latest temperature conversion result register. the - 41 applies to the DS1925. to specify the temperature alarm thresholds, the previous equation needs to be resolved to: talm = 2 x j (c) + 82 where + 82 applies to the DS1925.because the temperature alarm threshold is only 1 byte, the resolution or temperature increment is limited to 0.5c. the talm value needs to be converted into hexa - decimal format before it can be written to one of the tem - perature alarm threshold registers ( low alarm address 0208h; high alarm address 0209h ). independent of the conversion mode (8-bit or 16-bit), only the most significant byte of a temperature conversion is used to determine whether an alarm is generated. temperature sensor alarm the DS1925 has two temperature alarm threshold regis - ters (address 0208h, 0209h) to store values, which deter - mine whether a critical temperature has been reached. a temperature alarm is generated if the device measures an alarming temperature and the alarm signaling is enabled. the etla and etha bits that enable the temperature alarm are located in the temperature sensor control register. see table 7 for the bitmap. during a mission, there is only read access to this register. bits 7:2 have no function. they always read 0 and cannot be written to 1. the temperature alarm flags tlf and thf are found in the alarm status register at address 0214h. table 6. temperature alarm threshold examples table 7. temperature sensor control register bitmap table 8. temperature sensor control register bit descriptions DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 12 j (c) talm (DS1925) hex decimal 65.5 85h 133 30.0 3eh 62 addr b7 b6 b5 b4 b3 b2 b1 b0 0210h 0 0 0 0 0 0 etha etla bit name function b1 etha enable temperature high alarm. this bit controls whether during a mission the temperature high alarm lag (thf) may be set, if a temperature conversion results in a value equal to or higher than the val ue in the temperature high alarm threshold register. if etha is 1, temperature high alarms are enabled. if etha is 0, temperature high alarms are not generated. b0 etla enable temperature low alarm. this bit controls whether during a mission the temperature low alarm lag (tlf) may be set, if a temperature conversion results in a value equal to or lower than the valu e in the temperature low alarm threshold register. if etla is 1, temperature low alarms are enabled. if etla is 0, temperature low alarms are not generated. downloaded from: http:///
rtc control to minimize the DS1925s power consumption, the rtc oscillator should be turned off when device is not in use. the oscillator on/off bit is located in the rtc control reg - ister (0212h). turning the oscillator on when the device is in clear memory state incurs an additional t srtc delay. this register also includes the ehss bit, which deter - mines whether the sample rate is specified in seconds or minutes. table 9 shows the register bitmap. see table 10 for register descriptions. during a mission, there is only read access to this register. bits 7:2 have no function; they always read 0 and cannot be written to 1. mission control the DS1925 is set up for its operation by writing appropri - ate data to its special function registers, which are located in the two register pages. the settings in the mission control register determine which format (8 or 16 bits) is to be used and whether old data can be overwritten by new data, once the data-log memory is full. an additional control bit can be set to tell the DS1925 to wait with log - ging data until a temperature alarm is encountered. see table 11 for the register bitmap. during a mission, there is only read access to this register. bits 7:6 have no function; they always read 1 and cannot be written to 0. bits 1 and 3 control functions that are not available with the DS1925. bit 1 must be set to 0. under this condition the setting of bit 3 becomes a dont care. table 9. rtc control register bitmap table 10. rtc control register bit descriptions table 11. mission control register bitmap table 12. mission control register bit descriptions DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 13 addr b7 b6 b5 b4 b3 b2 b1 b0 0212h 0 0 0 0 0 0 ehss eosc bit name function b1 ehss enable high speed sample. this bit controls the speed of the sample rate counter. when set to logic 0, the sample rate is speciied in minutes. when set to logic 1, the sample rate is speciied in seconds. b0 eosc enable oscillator. this bit controls the crystal oscillator of the rtc. when set to logic 1, the oscillator starts operation. when written to logic 0, the oscillator stops and the device is in a low-power data- retention mode. this bit must be 1 for normal operation. xpc start mission command automatically starts the rtc by changing the eosc bit to logic 1. addr b7 b6 b5 b4 b3 b2 b1 b0 0213h 1 1 suta 1 (x) tlfs 0 etl bit name function b5 suta start mission upon temperature alarm. this bit speciies whether a mission begins immediately (includes delayed start) or if a temperature alarm is required to start the mission. if this bit is 1, the device performs an 8-bit temperature conversion at the selected sample rate and begins with data logging only if an alarming temperature (high alarm or low alarm) was found. the irst logged temperature is when the alarm occurred. however, the mission sample counter does not increment. this functionality is guaranteed by design and not production tested. b2 tlfs temperature logging format selection. this bit speciies the format used to store temperature readings in the data-log memory. if this bit is 0, the data is stored in 8-bit format. if this bit is 1, the 16-bit format is used (higher resolution). with 16-bit format, the most signiicant byte is stored at the lower address. b0 etl enable temperature logging. to set up the device for a temperature-logging mission, this bit must be set to logic 1. the recorded temperature values start at address 1000h. downloaded from: http:///
alarm status the fastest way to determine whether a programmed temperature threshold was exceeded during a mission is through reading the alarm status register. in a networked environment that contains multiple DS1925 devices, the devices that encountered an alarm can quickly be identi - fied by means of the conditional search rom command (see the 1-wire rom function commands section). the temperature alarm only occurs if enabled (see the temperature sensor alarm). the bor alarm is always enabled. see table 13 for the bitmap and table 14 for the bit descriptions. there is only read access to this register. bits 6:4 have no function; they always read 1. bits 3:2 have no function with the DS1925; they always read 0. the alarm status bits are cleared simultaneously when the xpc clear memory function is invoked. see the memory and control function commands for details. general statusthe information in the general status register tells the host computer whether a mission-related command was executed successfully. individual status bits indicate whether the DS1925 is performing a mission, waiting for a temperature alarm to trigger the logging of data, or wheth - er the data from the latest mission has been cleared. see table 15 for the bitmap. there is only read access to this register. bits 6 and 7 have no function. bits 0, 2, and 5 are normally 0s for typical operation but change to 1s to indicate if the register pages are a backup copy and represent the last state recorded at the start of a mission. mission start delay counter the content of the mission start delay counter register tells how many minutes have to expire from the time a mission was started until the first measurement of the mission takes place (suta = 0), or until the device starts testing the temperature for a temperature alarm (suta = 1). the mission start delay is stored as an unsigned 24-bit integer number. if the start delay is non-zero and the suta bit is set to 1, first the delay has to expire before the device starts testing for temperature alarms to begin logging data. see table 17 for the register bitmap. during a mission, there is only read access to these registers. for a typical mission, the mission start delay counter is 0. if a mission is too long for a single DS1925 to store all readings at the selected sample rate, one can use several devices and set the mission start delay for the second device to start recording as soon as the memory of the first device is full, and so on. mission timestamp the mission timestamp register indicates the date and time of the first temperature sample of the mission. there is only read access to the mission timestamp register. see table 18 for the register bitmap. table 13. alarm status register bitmap table 14. alarm status register bit descriptions DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 14 addr b7 b6 b5 b4 b3 b2 b1 b0 0214h bor 1 1 1 0 0 thf tlf bit name function b7 bor battery on reset alarm. if this bit reads 1, the device has performed a power-on-reset or battery-fail event. b1 thf temperature high alarm flag. if this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or higher than the value in the temperature high alarm register. a forced conversion can affect the thf bit. this bit can also be set with the initial alarm in the suta = 1 mode. b0 tlf temperature low alarm flag. if this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or lower than the value in the temperature low alarm register. a forced conversion can affect the tlf bit. this bit can also be set with the initial alarm in the suta = 1 mode. downloaded from: http:///
table 15. general status register bitmap table 16. general status register bit descriptions table 17. mission start delay counter register bitmap table 18. mission timestamp register bitmap DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 15 addr b7 b6 b5 b4 b3 b2 b1 b0 0215h 1 1 0 wfta memclr 0 mip 0 bit name function b4 wfta waiting for temperature alarm. if this bit reads 1, the mission start upon temperature alarm was selected and the xpc start mission command was successfully executed, but the device has not yet experienced the temperature alarm. this bit is cleared after a temperature alarm event, but is not affected by the xpc clear memory command. once set, wfta remains set if a mission is stopped before a temperature alarm occurs. to clear wfta manually before starting a new mission, set the high temperature alarm (address 0209h) to -40c and perform a forced conversion. b3 memclr memory cleared. if this bit reads 1, the mission timestamp, mission samples counter, as well as all the alarm lags of the alarm status register have been cleared in preparation of a new mission. executing the xpc clear memory command with parameter byte 01h clears these memory sections. the memclr bit returns to 0 as soon as a new mission is started by using the xpc start mission command. the memory must be cleared for a mission to start. b1 mip mission in progress. if this bit reads 1, the device has been set up for a mission and this mission is still in progress. the mip bit returns from logic 1 to logic 0 when a mission has ended. see the xpc start mission and xpc stop mission function commands. addr b7 b6 b5 b4 b3 b2 b1 b0 0216h delay low byte 0217h delay center byte 0218h delay high byte addr b7 b6 b5 b4 b3 b2 b1 b0 0219h lsbyte seconds 021ah . . . 021bh . . . 021ch msbyte seconds downloaded from: http:///
mission progress indicator depending on settings in the mission control register (address 0213h), the DS1925 logs temperature in 8-bit or 16-bit format. the mission samples counter register together with the starting address and the logging format (8 or 16 bits) provides the information to identify valid blocks of data that have been gathered during the current (mip = 1) or latest mission (mip = 0). see the data-log memory usage section for an illustration. see table 19 for the register bitmap. there is only read access to this register. the number read from the mission samples counter indicates how often the DS1925 woke up during a mis - sion to measure temperature. the number format is 24-bit unsigned integer. the mission samples counter is reset through the xpc clear memory command other indicators the device samples counter is similar to the mission samples counter. during a mission this counter incre - ments whenever the DS1925 wakes up to measure and log data and when the device is testing for a temperature alarm in suta mode. this way the device samples counter functions like a gas gauge for the battery that powers the ibutton device. there is only read access to this register. the device samples counter is reset to zero when the ibutton device is assembled. the counter increments a couple of times during final test. the number format is 24-bit unsigned integer. the maximum number that can be represented in this format is 16777215. the device configuration byte is used to allow the master to distinguish between the different versions of the ibutton logger devices. table 21 shows the codes assigned to the various devices. there is only read access to this register. security by password the DS1925 is designed to use two passwords that con - trol read access and full access. reading from or writing to the scratchpad as well as the xpc forced conversion command do not require a password. the password needs to be transmitted right after the command code of the memory or control function. if password checking is enabled, the password transmitted is compared to the passwords stored in the device. the data pattern stored in the password control register determines whether pass - word checking is enabled. see table 22 for the register bitmap. during a mission, there is only read access to this register. table 19. mission samples counter register bitmap table 20. device samples counter register bitmap table 21. device configuration byte (0226h) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 16 addr b7 b6 b5 b4 b3 b2 b1 b0 0220h low byte 0221h center byte 0222h high byte addr b7 b6 b5 b4 b3 b2 b1 b0 0223h low byte 0224h center byte 0225h high byte addr b7 b6 b5 b4 b3 b2 b1 b0 device 0226h 0 0 0 0 0 0 0 0 ds2422 0226h 0 0 1 0 0 0 0 0 ds1923 0226h 0 1 0 0 0 0 0 0 ds1922l 0226h 0 1 1 0 0 0 0 0 ds1922t 0226h 1 0 0 0 0 0 0 0 ds1922e 0226h 1 0 1 0 0 0 0 0 DS1925 downloaded from: http:///
to enable password checking, set epw to (aah). the default pattern of epw, and any value other than aah allows the 64-bit read and 64-bit full access passwords to be set. once password checking is enabled, changing the passwords and disabling password checking requires the knowledge of the current full-access password. before enabling password checking, passwords for read- only access and for full access (read/write/control) need to be written to the password registers. setting up a password or enabling/disabling the password checking is done in the same way as writing data to a memory location, only the address is different. because they are located in the same memory page, both passwords can be redefined at the same time. the read access password needs to be transmitted exactly in the sequence rp0, rp1 . . . rp62, rp63. this password only applies to xpc read memory function. the DS1925 delivers the requested data only if the pass - word transmitted by the master was correct or if pass - word checking is not enabled. see table 23 for the read access password register bitmap. there is only write access to this register. attempting to read the password reports all zeros. the password cannot be changed while a mission is in progress. the full access password needs to be transmitted exact - ly in the sequence fp0, fp1 . . . fp62, fp63. it affects the functions xpc read memory, xpc copy scratchpad, xpc clear memory, xpc start mission, and xpc stop mission. the DS1925 executes the command only if the password transmitted by the master was correct, or if password checking is not enabled. see table 24 for the full access password register bitmap. there is only write access to this register. attempting to read the password will report all zeros. the password cannot be changed while a mission is in progress. due to the special behavior of the write access logic, the password control register and both passwords must be written at the same time. when setting up new passwords, always verify (read back) the scratchpad before sending the xpc copy scratchpad command. after a new password is successfully copied from the scratchpad to its memory loca - tion, erase the scratchpad by filling it with new data (write scratchpad command). otherwise, a copy of the passwords remain in the scratchpad for public read access. table 22. password control register bitmap table 23. read access password register bitmap table 24. full access password register bitmap DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 17 addr b7 b6 b5 b4 b3 b2 b1 b0 0227h epw addr b7 b6 b5 b4 b3 b2 b1 b0 0228h rp7 rp6 rp5 rp4 rp3 rp2 rp1 rp0 0229h rp15 rp14 rp13 rp12 rp11 rp10 rp9 rp8 . . . . . . 022eh rp55 rp54 rp53 rp52 rp51 rp50 rp49 rp48 022fh rp63 rp62 rp61 rp60 rp59 rp58 rp57 rp56 addr b7 b6 b5 b4 b3 b2 b1 b0 0230h fp7 fp6 fp5 fp4 fp3 fp2 fp1 fp0 0231h fp15 fp14 fp13 fp12 fp11 fp10 fp9 fp8 . . . . . . 0236h fp55 fp54 fp53 fp52 fp51 fp50 fp49 fp48 0237h fp63 fp62 fp61 fp60 fp59 fp58 fp57 fp56 downloaded from: http:///
data-log memory usage once set up for a mission, the DS1925 logs the tempera - ture measurements at equidistant time points entry after entry in its data-log memory. the data-log memory is able to store 125,440 entries in 8-bit format or 62,720 entries in 16-bit format ( figure 7 ). in 16-bit format, the higher 8 bits of an entry are stored at the lower address. knowing the starting time point (mission timestamp) and the interval between temperature measurements, one can recon - struct the time and date of each measurement. the contents of the mission samples counter in conjunc - tion with the sample rate and the mission timestamp then allows reconstructing the time points of all values stored in the data-log memory. this gives the exact history over time for the most recent measurements taken. missioning the DS1925s typical task is recording temperature. before the device can perform this function, it needs to be set up properly. this procedure is called missioning. first, the DS1925 needs to have its rtc set to valid time and date. this reference time can be the local time, or, when used inside of a mobile unit, utc/gmt (coordinated universal time or greenwich mean time) or any other time standard that was agreed upon. the rtc oscillator must be running (eosc = 1). the memory assigned to store the mission timestamp, mission samples counter, and alarm flags must be cleared using the memory clear command. to enable the device for a mission, the etl bit must be set to 1. these are general settings that have to be made in any case, regardless of the type of object to be monitored and the duration of the mission. if alarm signaling is desired, the temperature alarm low and high thresholds must be defined. see the temperature conversion section on how to convert a temperature value into the binary code to be written to the threshold regis - ters. in addition, the temperature alarm must be enabled for the low and/or high threshold. this makes the device respond to a conditional search rom command (see the 1-wire rom function commands section), provided that an alarming condition has been encountered. the setting of the sample rate depends on the duration of the mission and the monitoring requirements. one should estimate the duration of the mission in minutes and divide the number by 125,440 (8-bit format) or 62,720 (16-bit format) to calculate the value of the sample rate (number of minutes between conversions). if the estimated dura - tion of a mission is 300 days (= 432,000 minutes), for example, then the 122kb capacity of the data-log mem - ory would be sufficient to store a new 11-bit value every 6.9 minutes (413 seconds). if the data-log memory of the DS1925 is not large enough to store all readings, one can use several devices and set the mission start delay to values that make the second device start logging as soon as the memory of the first device is full, and so on. after the mission start delay is set, the sample rate needs to be written to the sample rate register. the sample rate may be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. the fastest sample rate is one sam - ple per 3 minutes (ehss = 1, sample rate = 0b4h); how - ever, the fasted recommended sample rate is 5 minutes and the slowest is one sample every 273.05 hours (ehss = 0, sample rate = 3fffh). to get one sample every 6 minutes, for example, the sample rate value needs to be set to 6 (ehss = 0) or 360 decimal (equivalent to 0168h at ehss = 1). if there is a risk of unauthorized access to the DS1925 or manipulation of data, one should define passwords for read access and full access. before the passwords become effective, their use needs to be enabled. see the security by password section for more details. the last step to begin a mission is to issue the xpc start mission command. as soon as it has received this command, the DS1925 sets the mip flag and clears the memclr flag. with the immediate/delayed start mode (suta = 0), after as many minutes as specified by the mission start delay are over, the device wakes up, copies the current date and time to the mission timestamp register, and logs the first entry of the mission. this increments both the mission samples counter and device samples counter. all subsequent log entries are made as specified by the value in the sample rate register and the ehss bit. figure 7. temperature logging DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 18 etl = 1 tlfs = 0 01000h 125440 8-bit entries temperature 1f9ffh etl = 1 tlfs = 1 01000h 1f9ffh 16-bit entries temperature 1f9ffh with 16-bit format, the most-significant byte is stored at the lower address. downloaded from: http:///
if the start upon temperature alarm mode is chosen (suta = 1) and temperature logging is enabled (etl = 1), the DS1925 first waits until the start delay is over. then the device wakes up in intervals as specified by the sample rate and ehss bit and measure the tempera - ture. this increments the device samples counter and mission samples counter. the first sample of the mission is logged when the temperature alarm occurred. all sub - sequent log entries are made as specified by the value in the sample rate register and the ehss bit. the general-purpose memory operates independently of the other memory sections and is not write protected dur - ing a mission. all the DS1925s memory can be read at any time, i.e., to watch the progress of a mission. attempts to read the passwords will read ffh bytes instead of the data that is stored in the password registers. memory access address registers and transfer status because of the serial data transfer, the DS1925 employs three address registers: ta1, ta2, and e/s ( figure 8 ). registers ta1 and ta2 must be loaded with the target address to which the data are written or from which data are sent to the master upon a read command. register e/s acts like a byte counter and transfer status register. it is used to verify data integrity with write com - mands. therefore, the master only has read access to this register. the lower 5 bits of the e/s register indicate the address of the last byte that has been written to the scratchpad. this address is called ending offset. bit 5 of the e/s register, called pf or partial byte flag, is set if the number of data bits sent by the master is not an inte - ger multiple of 8. bit 6 is always a 0. note that the lowest 5 bits of the target address also determine the address within the scratchpad, where intermediate storage of data begins. this address is called byte offset. if the target address for a write command is 13ch, for example, then the scratchpad stores incoming data beginning at the byte offset 1ch and will be full after only 4 bytes. the corresponding ending offset in this example is 1fh. for best economy of speed and efficiency, the target address for writing should point to the beginning of a page, i.e., the byte offset is 0. thus, the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset of 1fh. the ending offset together with the pf is mainly a means to support the master checking the data integrity after a write command. the highest valued bit of the e/s register, called aa or authorization accepted, indicates that a valid copy command for the scratchpad has been received and executed. writing data to the scratchpad clears this flag. writing with veriication to write data to the DS1925, the scratchpad has to be used as intermediate storage. first, the master issues the write scratchpad command to specify the desired target address, followed by the data to be written to the scratchpad. in the next step, the master sends the read scratchpad command to read the scratchpad and to verify data integrity. as preamble to the scratchpad data, the DS1925 sends the requested target address ta1 and ta2 and the contents of the e/s register. if the pf flag is set, data did not arrive correctly in the scratchpad. the figure 8. address registers DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 19 bit 7 6 5 4 3 2 1 0 target address (ta1) t7 t6 t5 t4 t3 t2 t1 t0 target address (ta2) t15 t14 t13 t12 t11 t10 t9 t8 ending address with data status (e/s) (read only) aa 0 pf e4 e3 e2 e1 e0 downloaded from: http:///
master does not need to continue reading; it can start a new trial to write data to the scratchpad. similarly, a set aa flag indicates that the write command was not recognized by the device. if everything went correctly, both flags are cleared and the ending offset indicates the address of the last byte written to the scratchpad. now the master can continue verifying every data bit. after the master has verified the data, it has to use the xpc copy scratchpad command. this command sequence uses the three address registers ta1, ta2, and e/s as the master has read them verifying the scratchpad. as soon as the xpc copy scratchpad starts, it copies the data to the requested location beginning at the target address. memory and control function commands figure 9 describes the protocols necessary for access - ing the memory and the special function registers of the DS1925. see the mission example: prepare and start a new mission section for how to use these and other functions to set up the DS1925 for a mission. the communication between master and DS1925 takes place either at standard speed (default, od = 0) or at overdrive speed (od = 1). if not explicitly set into the overdrive mode, the DS1925 assumes standard speed. internal memory access during a mission has priority over external access through the 1-wire interface. this affects sev - eral of the commands described below. see the memory access conflicts section for details and remedies. write scratchpad command [0fh] after issuing the write scratchpad command, the master must first provide the 2-byte target address, followed by the data to be written to the scratchpad. the data is writ - ten to the scratchpad starting at the byte offset (t[4:0]). when executing the write scratchpad command, the crc generator inside the DS1925 (see figure 15 ) calcu - lates a crc of the entire data stream, starting at the com - mand code and ending at the last data byte sent by the master. this crc is generated using the crc-16 poly - nomial by first clearing the crc generator and then shift - ing in the command code (0fh) of the write scratchpad command, the target addresses ta1 and ta2 as supplied by the master and all the data bytes. if the ending offset is 11111b, the master may send 16 read time slots and receive the inverted crc-16 generated by the DS1925. note that both register pages are write protected dur - ing a mission. although the write scratchpad command works normally at any time, the subsequent xpc copy scratchpad to a register page fails during a mission. read scratchpad command [aah] this command is used to verify scratchpad data and target address. after issuing the read scratchpad command, the master begins reading. the first 2 bytes will be the target address. the next byte is the ending offset/data status byte (e/s) followed by the scratchpad data beginning at the byte offset (t4:t0), as shown in figure 8 . the master may continue reading data until the end of the scratchpad after which it receives an inverted crc-16 of the com - mand code, target addresses ta1 and ta2, the e/s byte, and the scratchpad data starting at the target address. after the crc is read, the bus master reads logical 1s from the DS1925 until a reset pulse is issued. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 20 downloaded from: http:///
figure 9a. memory/control function flowchart- xpc sub-commands flowchart DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 21 master tx memory or control fkt. command 0fh write scratchpad master tx ta1 (t7:t0) master tx ta2 (t15:t8) DS1925 sets scratch- pad offset = (t4:t0) and clears (pf, aa) master tx data byte to scratchpad offset DS1925 sets (e4:e0) = scratchpad offset master tx reset? scratch- pad offset = 11111b? partial byte written? y ny master tx reset? n master rx crc16 of command, address data master tx reset? n master rx "1"s y n y DS1925 increments scratchpad offset n y pf = 1 y n aah read scratchpad master rx ta1 (t7:t0) master rx ta2 (t15:t8) master rx ending offset with data status (e/s) DS1925 sets scratch- pad offset = (t4:t0) master tx reset? scratch- pad offset = 11111b? y ny master rx crc16 of command, address data, e/s byte, and data starting at the target address master tx reset? n master rx "1"s n y DS1925 increments scratchpad offset y n from rom functions flowchart (figure 12) to figure 9 2 nd part master rx data byte to scratchpad offset to rom functions flowchart (figure 12) from figure 9 2 nd part downloaded from: http:///
figure 9b. memory/control function flowchartxpc subcommands flowchart (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 22 to figure 92 nd part to figure 94 th part from figure 94 th part 66h xpc command master tx length byte see figures 9c, 9d, 9e, and 9f n from figure 92 nd part downloaded from: http:///
figure 9c. memory/control function flowchartxpc subcommands flowchart (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 23 99h xpc copy scrpd. bbh xpc stop mission? from figure 9 2 nd part, xpc n master rx crc16 master tx ta1 (t7:t0), ta2 (t15:t8) master waits (t lstd or t lstd + t srtc ) * master tx ffh release byte DS1925 copies scratchpad data to memory master waits t std * master tx e/ s byte master rx repeat result byte password accepted? n y n y y n *strong pull-up required master tx 64-bits [password] master tx reset? master tx 64-bits [password] master rx crc16 master tx ffh release byte DS1925 sets mip = 0, wfta = 0, write stop rtc value to mission backup master rx repeat result byte password accepted? n y y n master tx reset? auth code downloaded from: http:///
figure 9d. memory/control function flowchart (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 24 start delay counter = 0? ddh xpc start mission? from figure 93 rd part, xpc n DS1925 sets wfta = 1 DS1925 waits one sample period DS1925 sets wfta = 0 DS1925 start logging taking first sample DS1925 waits one sample period DS1925 copies rtc data to mission timestamp register DS1925 waits for 1 minute suta = 1? temp. alarm? DS1925 performs temp. conversion n n yy *strong pull-up required master rx crc16 master waits (t lstd or t lstd + t srtc ) * master tx ffh release byte DS1925 initiates mission start delay process master rx repeat result byte password accepted? n y y n master tx 64-bits [password] master tx reset? mission in progress? n y memclr = 1? y n mission start delay process n y DS1925 decrements start delay counter mip = 0? n y end of process downloaded from: http:///
figure 9e. memory/control function flowchart xpc sub-commands flowchart DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 25 44h xpc read mem. master tx parameters ta1, ta2 (with block mode selection) master tx 64 bits [password] master rx data byte from memory address *strong pullup required. y n end of block? y n master tx ff release byte DS1925 increments address counter master tx reset? n master rx crc16 of data crc ok? n master tx reset end of memory? n y y master tx reset? master rx "1"s n y y 96h xpc clear mem. [w/pw] master tx parameter (00h user or 01h log) master tx 64 bits [password] y n from figure 93 rd part, xpc master tx ff release byte password accepted? master tx reset? n y master rx crc16 master waits t cml or t lstd n y DS1925 clears mission log or user memory DS1925 sets memclr = 1 (for log clear) master rx repeat result byte * master rx crc1 6 master waits t std * downloaded from: http:///
figure 9f. memory/control function flowchart- xpc sub-commands flowchart (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 26 33h xpc read bat. volt. 4bh xpc forced conv.? from figure 95 th part, xpc n master rx crc16 master tx ff release byte master waits t lstd or t lstd + t srtc * master tx ff release byte master rx crc16 master tx ff release byte master waits t lstd or t lstd + t srtc * master tx ff release byte DS1925 copies result to address 020c/dh master rx forced conversion result ls byte first master rx battery voltage result ls byte first master rx crc16 of data master rx crc16 of data crc ok? crc ok? perform another? perform another? master tx reset master tx reset n y n n y y n y y n *strong pull-up required downloaded from: http:///
external power command (xpc) [66h]the external power command is a gateway command that allows subcommands to operate using an external strong pullup. the xpc command is followed by a length byte, the sub-command, and its parameter bytes. the master then receives a crc16, transmits an ffh dummy byte, and enables the strong pullup. xpc copy scratchpad [99h] the xpc copy scratchpad command is a subcommand of the external power command. this command is used to copy data from the scratchpad to the writable memory sections. the bus master sends the xpc command code [66h], length byte [0ch], xpc copy scratchpad command code [99h], ta1 address byte, ta2 address byte, and e/s byte. these three bytes are the authorization sequence and can be verified using a read scratchpad command. next, the master must transmit the full-access 64-bit password. at this point, the bus master sends 16 additional read data time slots and receives the inverted 16-bit crc. if the crc is correct, the master then sends the release byte [ffh], and strong pullup and delay of t lstd or t lstd + t srtc . the additional t srtc delay is required if this rtc is being enabled with this command and the device is in the clear memory state. if passwords are enabled and the transmitted password is different from the stored full-access password, the xp copy scratchpad command fails. if the password was correct or if passwords were not enabled, the device tests the 3-byte authorization code. if the authorization code pattern matches, the aa (authori - zation accepted) flag is set and the copy begins. after the required strong pullup delay, an ffh dummy byte is then read followed by a repeating result byte. the repeating byte is transmitted until the master issues a reset pulse to indicate success or an error condition. the data to be copied is determined by the three address registers. the scratchpad data from the beginning offset through the ending offset is copied, starting at the target address. the aa flag remains at logic 1 until it is cleared by the next write scratchpad command. with a suitable password, the xpc copy scratchpad always functions for the 16 pages of data memory. while a mission is in progress, write attempts to the register pages are not suc - cessful. the aa bit remaining at 0 indicates this. xpc start mission [ddh] the xpc start mission command is a subcommand of the external power command. this command is used to start a temperature logging mission the bus master sends the xpc command code [66h], length byte [09h], xpc start mission command code [ddh], 64-bit full-access password. at this point, the bus master sends 16 additional read data time slots and receives the inverted 16-bit crc. if the crc is correct, the master then sends the release byte [ffh], and strong pullup and delay of t lstd or t lstd + t srtc . the additional t srtc delay is required if this rtc was not already enabled and the device is in the clear memory state. a new mission can only be started if the previous mis - sion has been ended and the memory has been cleared. after the strong pullup, an ffh dummy byte is then read followed by a repeating result byte. a repeating result byte of 77h invalid parameter indicates that the selected sample rate is less than 3 minutes and is not supported. if passwords are enabled and the transmitted password is different from the stored full-access password, the xp start mission command fails with a repeating result byte of 11h invalid password. if the password was correct or if passwords were not enabled, the device starts a mission. if suta = 0, the sampling begins as soon as the mission start delay is over. if suta = 1, the first sample is written to the data-log memory at the time the temperature alarm occurred. at this point the mission sample counter incre - ments and the mission timestamp is set and the regular sampling and logging begins. while the device is waiting for a temperature alarm to occur, the wfta flag in the general status register reads 1. during a mission there is only read access to the register pages. the mission backup registers are written on a xpc start mission command. see figure 15 . xpc stop mission [bbh] the xpc stop mission command is a subcommand of the external power command. this command is used to stop a temperature logging mission the bus master sends the xpc command code [66h], length byte [09h], xpc stop mission command code [bbh], 64-bit full-access password. at this point, the bus master sends 16 additional read data time slots and receives the inverted 16-bit crc. if the crc is correct, the master then sends the release byte [ffh], and strong pullup and delay of t lstd . DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 27 downloaded from: http:///
the DS1925 uses a control function command to stop a mission. only a mission that is in progress can be stopped. after the strong pullup, an ffh dummy byte is then read followed by a repeating result byte. if pass - words are enabled and the transmitted password is differ - ent from the stored full-access password, the xpc stop mission command fails. if the password was correct or if passwords were not enabled, the device clears the mip bit in the general status register and restores write access to the register pages. the mission backup registers are written on a xpc stop mission command. see figure 15 . xpc read memory [44h] the xpc read memory command is a subcommand of the external power command. the command is applicable to the entire user memory and the datalog memory. the command can be used at any time, regardless of the bat - tery status.the bus master sends the xpc command code [66h], length byte [0bh], xpc read memory command code [44h], ta1 address byte, and ta2 address byte. next, the master must transmit one of the 64-bit passwords fol - lowed by release bytes [ffh], and strong pullup and delay of t std . if passwords are enabled and the transmitted password does not match one of the stored passwords, the xpc read memory command fails. the device reads the invalid password repeat byte instead of data memory. if the password was correct or if passwords were not enabled, the master reads data from the DS1925 begin - ning from the starting address and continuing until the end of the block is reached. block size is determined by the upper bits of ta2 as described below. at that point, the bus master sends 16 additional read data time slots and receives the inverted 16-bit crc. immediately following the crc, the master can issue another release byte, and strong pullup and delay of t std to read the next block. this sequence continues until the bus master resets the device. when trying to read the passwords or memory areas that are marked as reserved, the DS1925 transmits 00h or ffh bytes. the crc at the end of a block is based on the data as it was transmitted. with the initial pass through the xpc read memory flow, the 16-bit crc value is the result of shifting the xpc command byte, length byte, xpc read memory sub-com - mand, followed by the two address bytes and the 8 bytes of password. subsequent passes through the flow gener - ate a 16-bit crc that is the result of clearing the crc generator and then shifting in the contents of the data memory page. after the 16-bit crc of the last block is read, the bus master receives logical 1s from the DS1925 until a reset pulse is issued. the xpc read memory com - mand sequence can be ended at any point by issuing a reset pulse outside of the reserved strong pullup times. to access the entire memory space, the two most sig - nificant bits of ta2 can be used to change the address encoding. reference figure 8 for target address bit map. if t15 = 0, address (t14-t0) is used as a starting byte address which is limited to 2 15 . the following mode is used to start at higher pages. if t15 = 1, address (t13-t0) is used as a starting page number. in addition if the user is reading the data-log memory, t14 = 1 increases the block size to 64 bytes, or 2 pages. the t14 = 1 large block mode is only available for the datalog memory space. the mission backup register backup copies are written when the last mission was started. not all of the fields are backed up. the only fields that are valid in this condition are: sample rate (0206h to 0207h), temperature alarm (0208h to 0209h), temperature alarm enable (0210h), rtc enable (0212h), miscellaneous control (0213h), start delay counter (0216h to 0218h), mission time stamp (0219h to 021ch), mission sample counter (0220h to 0222h), and device samples counter (0223h to 0225h). to compute the new mission sample counter and device sample counter at the time the battery depleted, the log must be read. the end of long can be determined when the readings are ffh. see figure 15 . xpc clear memory [96h] the xpc clear memory command is used to prepare the device for another mission by clearing the log or to clear the user memory. this command is only executed to clear the log memory if no mission is in progress. xpc clear memory is a subcommand to the general-purpose xpc command 66h. the xpc command (66h) is sent first, followed by a length byte (0ah), the subcommand (96h), the parameter byte 00h for user memory or 01h for log memory, and then the password. after that the device responds with a crc- 16 of the preceding bytes. after this sequence the master sends an ffh release byte followed by a strong pullup and delay (t lstd for user memory and t cml for log memory). if passwords are enabled and the transmitted password is different from the stored full-access password or a mis - sion is in progress, the xpc clear memory command fails. the success or failure of the command is indicated by the repeat byte that is read after the strong pullup delay. if the password was correct or if passwords were not enabled DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 28 downloaded from: http:///
and the parameter is 01h, the device clears the mission log memory, mission timestamp, mission samples counter, and all alarm flags of the alarm status register. after these cells are cleared, the memclr bit of the general status register reads 1 to indicate the successful execution of the xpc clear memory command. this command and parameter clears the rtc (e0sc = 0). the mission backup registers are written on a xpc clear memory (log) command. see figure 15 . if the parameter is 00h, only the 16 pages of user memory are cleared. the rtc need not be enabled to clear the user memory. the user memory can be cleared during a mission. xpc forced conversion [4bh] the xpc forced conversion command can be used to measure the temperature without starting a mission. the length for this xpc command is one byte which is the command code. after the command code, the master has to send one ffh byte to get the conversion started. the conversion result is found as a 16-bit value in the latest temperature conversion result register. this command is only executed if no mission is in progress (mip = 0). it takes maximum t lstd to complete or t lstd + t srtc if the device is in the clear memory state. after the delay, an additional ffh byte is read followed by the temperature conversion result and a crc16. additional measurements can then be taken by issuing the first ffh byte again to repeat the sequence. the device samples counter does not increment for the xpc forced conversion command. xpc read battery voltage [33h] the xpc read battery voltage command can be used to measure the current battery voltage. the length for this xpc command is one byte which is the command code. after the command code the master has to send one ffh byte to get the voltage conversion started. this com - mand is only executed if no mission is in progress (mip = 0). it cannot be interrupted and takes maximum t lstd to complete. during this time, memory access through the 1-wire interface is blocked. the device behaves the same way as during a mission when the sampling inter - feres with a memory/control function command. after the delay, an additional ffh byte is read followed by the volt - age conversion result and a crc16. the 16-bit integer results can be converted to a voltage by dividing by 1024. additional measurements can then be taken by issuing the first ffh byte again to repeat the sequence. this func - tion is not available when the device is in the start state from factory until an xpc clear memory (log) sequence is done. at room temperature, a battery voltage of 2.5v or lower is considered marginal. memory access conlicts while a mission is in progress or while the device is waiting for a temperature alarm to start a mission, peri - odically a temperature sample is taken and logged. this internal activity has priority over 1-wire communica - tion. consequently, device-specific commands (excluding rom function commands, 1-wire reset, and read/write scratchpad for the DS1925) do not perform properly when internal and external activities interfere with each other. not affected are the commands start mission, forced conversion, and xpc clear memory (log), because they are not applicable while a mission is in progress or while the device is waiting for a temperature alarm. table 25 explains how the remaining three commands are affected by internal activity, how to detect this interference, and how to work around it. when writing driver software, it is important to know about the possibility of interference and to take measures to work around it. mission backup registers the mission backup registers are used to provide a recovery mechanism for a mission that stops due to a depleted battery. the xpc read memory command func - tions in a battery depleted condition. this condition is detected if the backup rtc is all ffs, the backup mission time stamp is all ffs, the mip bit is not set, and mission samples count is zero. the mission samples count can then be recovered by reading the log data until ffs are detected. the mission time stamp can be recovered from the mission backup registers. see figure 15 to see what registers are written to the mission backup registers. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 29 downloaded from: http:///
1-wire bus system the 1-wire bus is a system that has a single bus master and one or more slaves. in all instances, the DS1925 is a slave device. the bus master is typically a microcon - troller. the discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-wire signaling (signal types and timing). the 1-wire protocol defines bus transactions in terms of the bus state during specific time slots that are initiated on the falling edge of sync pulses from the bus master. hardware coniguration the 1-wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. to facilitate this, each device attached to the 1-wire bus must have open drain or three- state outputs. the 1-wire port of the DS1925 is open drain with an internal circuit equivalent to that shown in figure 10 . a multidrop bus consists of a 1-wire bus with multiple slaves attached. at standard speed the 1-wire bus has a maximum data rate of 16.3kbps. the speed can be boosted to 142kbps by activating the overdrive mode. the DS1925 maximum data rate in standard speed mode is 15.4kbps and 125kbps in overdrive mode. the value of the pullup resistor primarily depends on the network size and load conditions. the DS1925 requires a pullup resis - tor of maximum 2.2k at any speed. the idle state for the 1-wire bus is high. if for any reason a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. if this does not occur and the bus is left low for more than 16s (overdrive speed) or more than 120s (standard speed), one or more devices on the bus can be reset. with the DS1925 the bus must be left low for no longer than 12s at overdrive to ensure that no DS1925 on the 1-wire bus performs a reset. the DS1925 communicates properly when used in conjunction with a ds2480b or ds2490 1-wire driver and adapters that are based on these driver chips. during designated periods the ds2480 or ds2490 strong pullup feature must be enabled to provide sufficient power. table 25. memory access conflicts and remedy figure 10. hardware configuration DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 30 command indication of interference remedy xpc commands the data read changes to all ffh bytes or all bytes received are ffh, including the crc at the end of the command low. wait 20ms, 1-wire reset, address the device, and repeat the command. rxtx 100 mosfet data DS1925 1-wire port ds9490 rx = receive tx = transmit downloaded from: http:///
transaction sequence the protocol for accessing the DS1925 through the 1-wire port is as follows: initialization rom function command memory/control function command transaction/data initialization all transactions on the 1-wire bus begin with an initializa - tion sequence. the initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). the pres - ence pulse lets the bus master know that the DS1925 is on the bus and is ready to operate. for more details, see the 1-wire signaling section. 1-wire rom function commands once the bus master has detected a presence, it can issue one of the eight rom function commands that the DS1925 supports. all rom function commands are 8 bits long. a list of these commands follows (see figure 11 ). read rom [33h] this command allows the bus master to read the DS1925s 8-bit family code, unique 48-bit serial number, and 8-bit crc. this command can only be used if there is a single slave on the bus. if more than one slave is present on the bus, a data collision occurs when all slaves try to transmit at the same time (open drain produces a wired-and result). the resultant family code and 48-bit serial number results in a mismatch of the crc. match rom [55h] the match rom command, followed by a 64-bit rom sequence, allows the bus master to address a specific DS1925 on a multidrop bus. only the DS1925 that exactly matches the 64-bit rom sequence responds to the fol - lowing memory function command. all other slaves wait for a reset pulse. this command can be used with a single or multiple devices on the bus. search rom [f0h] when a system is initially brought up, the bus master might not know the number of devices on the 1-wire bus or their registration numbers. by taking advantage of the wired- and property of the bus, the master can use a process of elimination to identify the registration numbers of all slave devices. for each bit of the registration number, starting with the least significant bit, the bus master issues a triplet of time slots. on the first slot, each slave device participat - ing in the search outputs the true value of its registration number bit. on the second slot, each slave device par - ticipating in the search outputs the complemented value of its registration number bit. on the third slot, the master writes the true value of the bit to be selected. all slave devices that do not match the bit written by the master stop participating in the search. if both of the read bits are zero, the master knows that slave devices exist with both states of the bit. by choosing which state to write, the bus master branches in the romcode tree. after one complete pass, the bus master knows the registration number of a single device. additional passes identify the registration numbers of the remaining devices. refer to application note 187: 1-wire search algorithm for a detailed dis - cussion, including an example. conditional search rom [ech] the conditional search rom command operates simi - larly to the search rom command except that only those devices that fulfill certain conditions participate in the search. this function provides an efficient means for the bus master to identify devices on a multidrop system that have to signal an important event. after each pass of the conditional search that successfully determined the 64-bit rom code for a specific device on the multidrop bus, that particular device can be individually accessed as if a match rom had been issued, since all other devices will have dropped out of the search process and will be wait - ing for a reset pulse. the DS1925 responds to the conditional search if one of the three alarm flags of the alarm status register (address 0214h) reads 1. the temperature alarm only occurs if enabled (see the temperature sensor alarm section). the bor alarm is always enabled. the first alarm that occurs makes the device respond to the conditional search rom command. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 31 downloaded from: http:///
figure 11a. rom functions flowchart DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 32 to figure 11 2 nd part 33h read rom command? DS1925 tx rom function command y n rc = 0 55h match rom command? y n rc = 0 f0h search rom command? y n rc = 0 ech cond. search command? y n rc = 0 DS1925 tx presence pulse od reset pulse? n y od = 0 bus master tx reset pulse from figure 11 2 nd part from memory functions flowchart (figure 9) condition met? n y DS1925 tx bit 0 DS1925 tx bit 0 master ts bit 0 DS1925 tx bit 0 DS1925 tx bit 0 master tx bit 0 y master tx bit 0 DS1925 tx family code (1 byte) bit 0 match? n y bit 0 match? n y bit 0 match? y n DS1925 tx bit 1 DS1925 tx bit 1 master tx bit 0 bit 1 match? n y DS1925 tx bit 63 DS1925 tx bit 63 master tx bit 63 bit 63 match? n y rc = 1 DS1925 tx bit 1 DS1925 tx bit 1 master tx bit 1 bit 1 match? n y DS1925 tx bit 63 DS1925 tx bit 63 master tx bit 63 bit 63 match? n y rc = 1 master tx bit 1 bit 1 match? y n master tx bit 63 bit 63 match? n y rc = 1 DS1925 tx serial number (6 bytes) DS1925 tx crc byte to figure 112 nd part from figure 112nd part to memory functions flowchart (figure 9) downloaded from: http:///
figure 11b. rom functions flowchart (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 33 cch skip rom command? y n rc = 0 a5h resume command? y n 3ch overdrive skip rom? y n rc = 0 ; od = 1 69h overdrive match rom? y n rc = 0 ; od = 1 master tx bit 0 bit 0 match? n y master tx reset? n master tx bit 1 bit 1 match? y master tx bit 63 bit 63 match? y rc = 1 master tx reset? n rc = 1? y n n n y y from figure 111 st part to figure 11 1 st part to figure 111 st part from figure 111 st part downloaded from: http:///
skip rom [cch] this command can save time in a single-drop bus system by allowing the bus master to access the memory func - tions without providing the 64-bit rom code. if more than one slave is present on the bus and, for example, a read command is issued following the skip rom command, data collision will occur on the bus as multiple slaves transmit simultaneously (open-drain pulldowns will pro - duce a wired-and result). resume [a5h] the DS1925 needs to be accessed several times before a mission starts. in a multidrop environment this means that the 64-bit rom code after a match rom command has to be repeated for every access. to maximize the data throughput in a multidrop environment, the resume function was implemented. this function checks the sta - tus of the rc (resume control) bit and, if it is set, directly transfers control to the memory/control functions, similar to a skip rom command. the only way to set the rc bit is through successfully executing the match rom, search rom, or overdrive-match rom command. once the rc bit is set, the device can repeatedly be accessed through the resume command function. accessing another device on the bus clears the rc bit, preventing two or more devices from simultaneously responding to the resume command function. overdrive-skip rom [3ch] on a single-drop bus this command can save time by allowing the bus master to access the memory/control functions without providing the 64-bit rom code. unlike the normal skip rom command, the overdrive-skip rom sets the DS1925 into overdrive mode (od = 1). all com - munication following this command has to occur at over - drive speed until a reset pulse of minimum 640s duration resets all devices on the bus to standard speed (od = 0). when issued on a multidrop bus, this command sets all overdrive-supporting devices into overdrive mode. to subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed has to be issued followed by a match rom or search rom command sequence. this speeds up the time for the search pro - cess. if more than one slave supporting overdrive is pres - ent on the bus and the overdrive-skip rom command is followed by a read command, data collision occurs on the bus as multiple slaves transmit simultaneously (open- drain pulldowns produce a wired-and result). overdrive-match rom [69h] the overdrive-match rom command followed by a 64-bit rom sequence transmitted at overdrive speed allows the bus master to address a specific DS1925 on a multidrop bus and to simultaneously set it in overdrive mode. only the DS1925 that exactly matches the 64-bit rom sequence responds to the subsequent memory/ control function command. slaves already in overdrive mode from a previous overdrive-skip rom or success - ful overdrive-match rom command remain in overdrive mode. all overdrive-capable slaves return to standard speed at the next reset pulse of minimum 640s duration. the overdrive-match rom command can be used with a single device or multiple devices on the bus. 1-wire signaling the DS1925 requires strict protocols to ensure data integ - rity. the protocol consists of four types of signaling on one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. except for the pres - ence pulse, the bus master initiates all these signals. the DS1925 can communicate at two different speeds: standard speed and overdrive speed. if not explicitly set into overdrive mode, the DS1925 communicates at standard speed. while in overdrive mode the fast timing applies to all waveforms. to get from idle to active, the voltage on the 1-wire line needs to fall from v pup below the threshold v tl . to get from active to idle, the voltage needs to rise from v ilmax past the threshold v th . the time it takes for the voltage to make this rise is seen in figure 12 as ? and its dura - tion depends on the pullup resistor (r pup ) used and the capacitance of the 1-wire network attached. the voltage v ilmax is relevant for the DS1925 when determining a logical level, not triggering any events. figure 12 shows the initialization sequence required to begin any communication with the DS1925. a reset pulse followed by a presence pulse indicates the DS1925 is ready to receive data, given the correct rom and mem - ory function command. if the bus master uses slew-rate control on the falling edge, it must pull down the line for t rstl + t f to compensate for the edge. a t rstl duration of 640s or longer exits overdrive mode, returning the device to standard speed. if the DS1925 is in overdrive mode and t rstl is no longer than 80s, the device remains in overdrive mode. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 34 downloaded from: http:///
after the bus master has released the line it goes into receive mode (rx). now the 1-wire bus is pulled to v pup through the pullup resistor or, in case of a ds2490 driver, by active circuitry. when the threshold v th is crossed, the DS1925 waits for t pdh and then transmits a presence pulse by pulling the line low for t pdl . to detect a presence pulse, the master must test the logical state of the 1-wire line at t msp . the t rsth window must be at least the sum of t pdh- max , t pdlmax , and t recmin . immediately after t rsth is expired, the DS1925 is ready for data communication. in a mixed population network t rsth should be extended to minimum 480s at standard speed and 48s at overdrive speed to accommodate other 1-wire devices. read-/write-time slots data communication with the DS1925 takes place in time slots, which carry a single bit each. write time slots transport data from bus master to slave. read time slots transfer data from slave to master. the definitions of the write and read time slots are illustrated in figure 13 . all communication begins with the master pulling the data line low. as the voltage on the 1-wire line falls below the threshold v tl , the DS1925 starts its internal timing generator that determines when the data line is sampled during a write time slot and how long data is valid during a read time slot. master-to-slave for a write-one time slot, the voltage on the data line must have crossed the v th threshold before the write- one low time t w1lmax is expired. for a write-zero time slot, the voltage on the data line must stay below the v th threshold until the write-zero low time t w0lmin is expired. the voltage on the data line should not exceed v ilmax during the entire t w0l or t w1l window. after the v th threshold has been crossed, the DS1925 needs a recovery time t rec before it is ready for the next time slot. slave-to-mastera read-data time slot begins like a write-one time slot. the voltage on the data line must remain below v tl until the read low time t rl is expired. during the t rl window, when responding with a 0, the DS1925 starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again. when responding with a 1, the DS1925 does not hold the data line low at all, and the voltage starts rising as soon as t rl is over. figure 12. initialization procedure: reset and presence pulse DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 35 v ihmaster master rx presence pulse v pup v th v tl v ilmax 0v t f t rec t pdh master tx reset pulse t rstl t pdl t rsth t msp resistor master DS1925 downloaded from: http:///
figure 13. read/write timing diagrams DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 36 v pup v th v tl v ilmax 0v v ihmaster t slot t w1l v th v tl v ilmax 0v v ihmaster t f t w0l t rec v pup v th v tl v ilmax 0v v ihmaster t f master sampling window t slot t rec t el t msrl t slot t f write- one time slot write- zero time slot read- data time slot resistor master resistor master resistor master DS1925 v pup downloaded from: http:///
the sum of t rl + (rise time) on one side and the internal timing generator of the DS1925 on the other side define the master sampling window (t msrmin to t msrmax ) in which the master must perform a read from the data line. for most reliable communication, t rl should be as short as permissible and the master should read close to but no later than t msrmax . after reading from the data line, the master must wait until t slot is expired. this guarantees sufficient recovery time t rec for the DS1925 to get ready for the next time slot. crc generation with the DS1925 there are two different types of crcs (cyclic redundancy checks). one crc is an 8-bit type and is stored in the most significant byte of the 64-bit rom. the bus master can compute a crc value from the first 56 bits of the 64-bit rom and compare it to the value stored within the DS1925 to determine if the rom data has been received error-free. the equivalent polynomial function of this crc is x 8 + x 5 + x 4 + 1. this 8-bit crc is received in the true (noninverted) form. it is computed at the factory and lasered into the rom. the other crc is a 16-bit type, generated according to the standardized crc-16 polynomial function x 16 + x 15 + x 2 + 1. this crc is used for error detection when read - ing register pages or the data-log memory using the xpc read memory command and for fast verification of a data transfer when writing to or reading from the scratchpad. in contrast to the 8-bit crc, the 16-bit crc is always communicated in the inverted form. a crc-generator inside the DS1925 ( figure 14 ) calculates a new 16-bit crc as shown in figure 9 . the bus master compares the crc value read from the device to the one it calculates from the data and decides whether to continue with an operation or to reread the portion of the data with the crc error. with the initial pass through the xpc read memory flowchart, the 16-bit crc value is the result of shifting the command byte into the cleared crc generator, followed by the two address bytes and the data bytes. the pass - word is excluded from the crc calculation. subsequent passes through the xpc read memory flowchart gener - ate a 16-bit crc that is the result of clearing the crc generator and then shifting in the data bytes. with the write scratchpad command, the crc is gener - ated by first clearing the crc generator and then shifting in the command code, the target addresses ta1 and ta2, and all the data bytes. the DS1925 transmits this crc only if the data bytes written to the scratchpad include scratchpad ending offset 11111b. the data can start at any location within the scratchpad. with the read scratchpad command, the crc is gener - ated by first clearing the crc generator and then shifting in the command code, the target addresses ta1 and ta2, the e/s byte, and the scratchpad data starting at the target address. the DS1925 transmits this crc only if the reading continues through the end of the scratchpad, regardless of the actual ending offset. for more informa - tion on generating crc values, refer to application note 27: understanding and using cyclic redundancy checks with maxim 1-wire and ibutton products . figure 14. crc-16 hardware description and polynomial DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 37 x 11 12 th stage 13 th stage 14 th stage 15 th stage 16 th stage x 12 x 13 x 14 x 15 x 16 crcoutput input data x 8 9 th stage 10 th stage 11 th stage x 9 x 10 1 st stage 2 nd stage 3 rd stage x 0 x 1 x 2 polynomial = x 16 + x 15 + x 2 + 1 x 4 5 th stage 6 th stage 7 th stage 8 th stage x 5 x 6 x 7 4 th stage x 3 downloaded from: http:///
figure 15. mission backup registers, write behavior DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 38 addr( offset 0060h) function written on xpc clear memory (log) written on xpc start mission (or at time of suta) written on xpc stop mission restored after clear memory state 0200h real \ time clock registers (seconds) marks the end of the mission 0201h0202h 0203h 0204h 0205h 0206h sample rate 0207h0208h temp. alarms 0209h 020ah020bh 020ch latest temp. 020dh 020eh 020fh 0210h t.alm.en. 0211h 0212h rtc en. 0213h mis. cntrl. 0214h alm. stat. 0215h gen. stat. (memclr bit only) (memclr bit only) 0216h start delay counter 0217h0218h 0219h 021ah mission time stamp 021bh 021ch021dh version 021eh 021fh test mode flag (aa for tm) downloaded from: http:///
figure 15. mission backup registers, write behavior (continued) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 39 addr( offset 0060h) function written on xpc clear memory (log) written on xpc start mission (or at time of suta) written on xpc stop mission restored after clear memory state 0220h mission samples counter 0221h0222h 0223h device samples counter 0224h0225h 0226h flavor 0227h pw. cntrl. 0228h read access password 0229h 022ah022bh 022ch022dh 022eh 022fh 0230h full access password 0231h0232h 0233h 0224h 0225h 0226h 0227h 0238h mission duration in seconds 0239h 023ah023bh 023ch023dh 023eh 023fh downloaded from: http:///
DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 40 command-speciic 1-wire communication protocollegend command-speciic 1-wire communication protocolcolor codes symbol description rst 1-wire reset pulse generated by master pd 1-wire presence pulse generated by slave select command and data to satisfy the rom function protocol ws command write scratchpad rs command read scratchpad cps command xpc copy scratchpad cm command xpc clear memory fc command xpc forced conversion sm command xpc start mission stp command xpc stop mission xpc command external power command rr command xpc read memory rb command xpc read battery voltage ta target address ta1, ta2 ta-e/s target address ta1, ta2 with e/s byte transfer of as many data bytes as are needed to reach the scratchpad offset 1fh transfer of as many data bytes as are needed to reach the end of a memory page transfer of as many data bytes as are needed to reach the end of the data-log memory transfer of 8 bytes that either represent a valid password or acceptable dummy data <32 bytes> transfer of 32 bytes transfer of an undetermined amount of data ffh transmission of one byte ffh crc16 transfer of an inverted crc-16 ff loop indeinite loop where the master reads ff bytes aa loop indeinite loop where the master reads aa bytes master to slave slave to master downloaded from: http:///
DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 41 1-wire communication examples write scratchpad, reaching the end of the scratchpad (cannot fail) rst pd select ws ta crc16 ff loop read scratchpad (cannot fail) rst pd select rs ta-e/s crc16 ff loop xpc copy scratchpad rst pd select xpc 0ch cps ta-e/s crc16 release byte (spu) ffh result loop xpc clear memory (log) rst pd select xpc 0ah cm 01 pw crc16 (spu) ffh result loop to verify success, read the general status register at address 0215h. if memclr is 1, the command was executed successfully. xpc forced conversion rst pd select xpc 01h fc crc16 (spu) ffh temp result crc16 to read the result and to verify success, read the addresses 020ch?020fh (results) and the device sa mples counter at address 0223h?0225h. if the count has incremented, the command was executed successfully. xpc read battery voltage rst pd select xpc 01h rb crc16 (spu) ffh battery result crc16 xpc start mission rst pd select xpc 09h sm crc16 release byte (spu) ffh result loop to verify success, read the general status register at address 0215h. if mip is 1 and memclr is 0, the command was executed successfully. xpc stop mission rst pd select xpc 09h stp crc16 release byte (spu) ffh result loop to verify success, read the general status register at address 0215h. if mip is 0, the command was executed successfully. xpc read memory (success) rst pd select xpc 0bh rr ta1 ta2 pw crc16 (spu) ffh crc16 (spu) ff loop loop until end of memory downloaded from: http:///
mission example: prepare and start a new mission assumption: the previous mission has been ended by using the xpc stop mission command. passwords are not enabled. the device is a DS1925. starting a mission requires four steps: step 1: clear the data of the previous mission. step 2: write the setup data to register page 1. step 3: start the mission. mission example: step 1 clear the previous mission. with only a single device con - nected to the bus master, the step 1 communication looks like table 26 . mission example: step 2during the setup, the device needs to learn the following information: time and date sample rate alarm thresholds alarm controls (response to conditional search) general mission parameters (e.g., channels to log and logging format, rollover, start mode) mission start delay table 27 shows the data that sets up the DS1925 for a mission that logs temperature using 11-bit format. such a mission could last up to 435 days until the 122kb data-log memory is full. with only a single device connected to the bus master, the step 2 communication looks like table 28 . mission example: step 3 start the new mission. with only a single device con - nected to the bus master, the communication of step 3 looks like table 28 . if step 3 is successful, the mip bit in the general status register is 1, the memclr bit is be 0, and the mission start delay counts down. table 26. clear the previous mission communication DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 42 master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 66h issue xpc command command tx 0ah issue length byte tx 96h issue xpc clear memory sub-command tx 01h parameter indicating log memory tx <8 ffh bytes> send dummy password rx <2 byte crc16> read crc of preceding bytes tx ffh send release byte strong pullup and delay to perform memory clear t cml rx (repeat byte) read repeat byte to indicate success downloaded from: http:///
table 27. data for temperature-logging mission (11-bit format) DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 43 address data example values function 0200h 4bh 0201h 32h april 23, 2015 1:59pm time/date 0202h 39h 0203h 55h 0204h 00h (dont care) 0205h 00h 0206h 0ah every 10 minutes (ehss = 0) sample rate 0207h 00h 0208h 52h 0c low temperature alarm 0209h 66h 10c high threshold 020ah 00h 020bh ffh (dont care) (not applicable with DS1925) 020ch ffh 020dh ffh (dont care) clock through 020eh ffh read-only registers 020fh ffh 0210h 02h enable high alarm temperature alarm control 0211h fch (not applicable with DS1925) 0212h 01h on (enabled), ehss = 0 (low sample rate) rtc oscillator control, sample rate selection 0213h c5h normal start; 11-bit temperature log general mission control 0214h ffh (dont care) clock through 0215h ffh read-only registers 0216h 5ah 0217h 00h 90 minutes mission start delay 0218h 00h downloaded from: http:///
table 28. write setup data to register page 1 communication DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 44 master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 0fh issue write scratchpad command tx 00h ta1, beginning offset = 00h tx 02h ta2, address = 0200h tx <25 data bytes> write 25 bytes of data to scratchpad tx <7 ffh bytes> write through the end of the scratchpad rx <2 byte crc16> read crc of preceding bytes tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx aah issue read scratchpad command rx 00h read ta1, beginning offset = 00h rx 02h read ta2, address = 0200h rx 1fh read e/s, ending offset = 1fh, lags = 0h rx <32 data bytes> read scratchpad data and verify tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 66h issue xpc command command tx 0ch issue length byte tx 99h issue xpc copy scratchpad subcommand tx 00h ta1 ta2 (authorization code) e/s tx 02h tx 1fh tx <8 ffh bytes> send dummy password rx <2 byte crc16> read crc of preceding bytes tx ffh send release byte delay to perform xpc copy scratchpad (t std ) tx ffh send dummy byte rx (repeat byte) read repeat byte to indicate success downloaded from: http:///
table 29. start the new mission communication #denotes a rohs-compliant device that can include lead(pb) that is exempt under the rohs requirements. DS1925 ibutton high-capacity temperature logger with 122kb data-log memory www.maximintegrated.com maxim integrated 45 master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 66h issue xpc command command tx 09h issue length byte tx ddh issue xpc start mission subcommand tx <8 ffh bytes> send dummy password rx <2 byte crc16) read crc of preceding bytes tx ffh send release byte delay to perform xpc start mission (t lstd ) tx ffh send dummy byte rx (repeat byte) read repeat byte to indicate success tx (reset) reset pulse rx (presence) presence pulse ordering information package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range pin-package DS1925l-f5# -40c to +85c ibutton f5 can package type package code outline no. land pattern no. ibutton f5 can ib#6cb 21-0266 downloaded from: http:///
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. ? 2016 maxim integrated products, inc. 46 DS1925 ibutton high-capacity temperature logger with 122kb data-log memory revision history revision number revision date description pages changed 0 3/16 initial release 1 4/16 updated typical application circuit , electrical characteristics table, pin coniguration , figure 2, clear memory state section, table 1, figure 5, sample rate section, rtc control section, table 10, table 16, other indicator section, security by password section, missioning section, writing with veriication section, write scratchpad command [0fh] section, removed copy scratchpad with password command [99h] section, updated figures 9b, 9c, 9d, 9e, 9f, removed start mission with password [cch] and stop mission with password [33h] sections, updated external power command (xpc) [66h] section, xpc read memory [44h] section, xpc clear memory [96h] section, xpc forced conversion [4bh] section, xpc read battery voltage [33h] section, added mission backup registers section, updated table 25, crc generation section, command-speciic 1-wire communication protocollegend table, 1-wire communication examples, mission example: prepare and start a new mission section, table 28, and added figure 15 1C3, 6C8, 11, 13, 15C20, 22C29, 36C45 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///


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